1. Introduction — Conducted Noise Is a Legal Limit, Not an Option

Every switching power supply generates conducted electromagnetic interference (EMI) at its input and output terminals — the current spikes of the power switch and the voltage ripple across parasitic capacitances are unavoidable. Whether the design is a mains flyback or a DC-DC converter on a board, the noise must be kept below regulatory conducted-emission limits (CISPR 22/32, 150 kHz–30 MHz) and, in practice, below the susceptibility of the rest of the system. The tool for this is the input EMI filter: a passive network of inductors and capacitors (LC, π, T topologies) designed to provide insertion loss where the noise spectrum is worst. This guide explains the physics of differential-mode (DM) and common-mode (CM) noise, how to separate and model them, how to design and place the filter network, how to choose the common-mode choke and X/Y capacitors, the ground-and-layout traps (ground bounce, loop area), the CISPR limit structure, and the parasitic elements that ruin a “textbook” filter.

2. Conducted EMI Mechanisms

2.1 Where the noise comes from

• dI/dt of the switch: the power MOSFET/switch turns on and off at the switching frequency, drawing sharp current pulses from the input. These are broadband — harmonics extend well beyond the switching frequency.
• dI/dt of the diode: the output rectifier’s reverse recovery (in non-synchronous topologies) injects high-frequency current spikes.
• dV/dt of the switch node: the node between the switch and inductor jumps between rails at kHz–MHz rates, driving displacement current through parasitic capacitances to ground — this is the primary common-mode path.
• Parasitic capacitance: switch-node capacitance to the heatsink, transformer inter-winding capacitance, and PCB coupling to ground all convert dV/dt into CM current.

2.2 Differential vs. common mode

3. EMI Filter Topologies

4. Insertion Loss & Component Sizing

4.1 The design workflow

1. Measure/estimate the noise spectrum at the LISN (or simulate the switching current). Identify the worst offending harmonic and the required attenuation at each band (150 kHz–30 MHz).
2. Set the required attenuation: Att(dB) = V_{noise,measured}(dBµV) − V_limit(dBµV) + margin (typically 6–10 dB).
3. Choose topology and corner frequency so the roll-off provides the needed attenuation at the worst harmonic.
4. Size components with the LC relations above; mind the DM vs. CM split.
5. Verify by measurement — parasitics and layout often dominate at 10–30 MHz; the first prototype rarely matches the ideal model.

4.2 Component sizing rules

• X capacitors (across lines, DM): must be safety-rated X2 for mains (withstand line-to-line transients) and handle the line ripple current. Large X caps give high DM attenuation at low cost but also pull reactive current and can resonate with the CM choke.
• Y capacitors (line-to-ground, CM): safety-rated Y-class; their value is leakage-current limited (mains safety standards cap total Y capacitance — typically a few nF for 50/60 Hz leakage ≤ 0.25–0.5 mA). Y caps provide the CM return path.
• Common-mode choke: two windings on a common core; DM current flows in opposite directions and cancels (low DM impedance, no core saturation), CM current adds flux (high impedance). A CM choke adds DM inductance “for free” if leakage inductance is sufficient.
• Core selection: nanocrystalline or ferrite depending on CM vs. DM needs and frequency; avoid core saturation by the DM current — saturation destroys CM impedance at the wrong time.

5. Common-Mode Choke & X/Y Capacitor Selection

5.1 Worked example — sizing a mains input filter

6. Grounding, Ground Bounce & Layout

Layout kills more filters than component choice. The “ideal” model assumes perfect grounds and zero parasitic inductance — neither is true on a real board.

• Single-point vs. star grounding for CM: CM current returns through ground/earth. A noisy ground plane shared with the switching current injects noise into the filter’s ground reference, defeating the Y caps. Keep the filter’s ground connection short and direct to the chassis/earth point, separate from the power ground.
• Ground bounce: fast dI/dt through PCB trace inductance (V = L·dI/dt) lifts the “ground” potential under the filter, so the filter’s output looks noisy even with ideal components. Minimize trace inductance: short, wide, paired return paths.
• Loop area: DM noise is proportional to the loop area of the input current path. Route the input pair close together (twisted or adjacent), keep the switching loop (input cap ↔ switch ↔ diode) tight — loop area is a direct multiplier on radiated and conducted noise.
• Y-cap return path: Y caps must connect to a true low-impedance earth/chassis point, not through a long trace that resonates.
• Keep the filter’s output clean: place the filter close to the input connector and keep the output traces away from the noisy switch node; a poorly placed filter couples noise in after it filtered it out.

7. The CISPR Conducted Limits

Class B is the residential limit (tighter than Class A industrial). Note the quasi-peak vs. average distinction: a design that meets quasi-peak usually meets average, but bursty noise (e.g., PWM packet bursts) can trip one without the other. The filter must be validated against both detectors.

8. Component Parasitics That Ruin Filters

• Capacitor ESL: every real capacitor has series inductance; above its self-resonant frequency it stops shunting and starts resonating. At 10–30 MHz a “100 nF X cap” may be inductive — parallel a smaller low-ESL cap (e.g., 1 nF ceramic) where HF attenuation is needed.
• Inductor inter-winding capacitance: the CM choke’s windings have parasitic capacitance that forms a parallel resonant path, creating a notch in CM impedance at high frequency — after which CM impedance actually rises again as the parallel C dominates.
• Trace/lead inductance: the inductance of the connections to the filter (vias, long traces) adds series L that can move the filter’s corner unpredictably and resonate with the Y caps.
• Core saturation with DC bias: DM current biases the CM choke core; if the core saturates at load current, CM impedance collapses exactly when you need it. Choose a core with adequate DC-bias headroom (check AL vs. current curve).
• Resonance with the supply: the filter’s LC resonance can interact with the converter’s input impedance causing oscillation; add damping (series R with the X cap, or a damping branch) if the filter rings.

9. Common Mistakes

• Treating DM and CM as the same — a filter with only X caps leaves CM noise untouched and vice versa; separate the modes at the measurement stage.
• Y-cap value set by leakage limit, not noise — too small a Y cap can’t shunt the CM current; know the leakage budget and use it.
• Oversized components for no reason — huge X caps cause reactive current, resonance, and cost; size to the required attenuation with margin, not “bigger is safer.”
• Bad ground reference for the filter — grounding the filter to the same plane the switcher bounces ruins the CM performance.
• Ignoring component self-resonance at 10–30 MHz — the filter “works” at 150 kHz but fails the 30 MHz harmonics because the caps are inductive up there.
• Filter placed far from the connector — the un-filtered segment between connector and filter radiates/couples and re-injects noise.
• No margin in the attenuation budget — 0 dB of margin means a slightly different board or a temperature change fails the test; target 6–10 dB.

10. Frequently Asked Questions

Q1. Why is my filter attenuating but the EMC test still fails at high frequency?
Almost always component parasitics or layout: capacitor ESL, CM-choke inter-winding capacitance, or a poor ground reference. Above ~10 MHz, measure with a spectrum analyzer and probe directly at the filter nodes to find where the attenuation stops.

Q2. How much Y capacitance can I use?
Mains safety standards limit leakage current: for a 50/60 Hz supply, total Y capacitance is typically limited to a few nF (e.g., ≤ 0.25–0.5 mA leakage ⇒ ~4.7–10 nF total at 230 V/50 Hz). Check the applicable product safety standard for your market.

Q3. Do I need a π or T filter?
For most converters an LC plus a CM choke and X/Y caps suffices. A π or T (3rd order) is needed when you need >40–60 dB attenuation or when the source/load impedance environment demands a specific image impedance. Start with LC, add stages only if measurement demands.

Q4. Can I just add more capacitance?
Sometimes, but X-cap value is limited by reactive current and Y-cap by leakage. Beyond that, more C without more L only moves the corner, not the roll-off — adding a stage (more L + C) is usually the correct fix.

Q5. What is the LISN and why is it in the test?
The Line Impedance Stabilization Network provides a standardized 50 Ω input impedance to the EUT so measurements are repeatable across labs, and it also blocks mains noise from contaminating the measurement. Your lab’s conducted-EMI measurement is made across this 50 Ω port.

Q6. My converter oscillates after adding the filter — what’s happening?
The filter’s LC resonance is interacting with the converter’s input impedance, forming a negative-resistance oscillation (the classic “filter-induced instability” of a closed-loop supply). Damp the filter with a series resistor across the X cap or add a damping branch, and/or add a bulk cap close to the converter input.