PWM to Voltage Calculator

This tool calculates the DC output voltage of a first-order RC low-pass filter driven by a PWM signal, and determines the optimal resistor (R) and capacitor (C) values needed to achieve a user-specified ripple voltage. It also estimates the resulting output impedance and filter cutoff frequency.

Use it when designing PWM-based digital-to-analog converters (DACs) — for example, generating analog control voltages for LED dimming, motor speed control, sensor calibration, or audio waveform synthesis where precision and low ripple are critical.

The ripple target (in mV) defines the peak-to-peak AC component remaining on the filtered DC output. Lower values require larger RC time constants, which improve smoothing but reduce bandwidth and increase settling time — a key trade-off in DAC design.

Load resistance (R_L) forms a parallel path with the filter resistor (R), affecting both output voltage accuracy and effective time constant. The calculator accounts for this loading effect to ensure realistic R/C recommendations and avoid underestimating required capacitance.

For microcontroller-based DACs: 1–50 kHz PWM frequency is common; ripple targets range from 1–5 mV for precision analog control (e.g., sensor biasing) to 10–50 mV for less sensitive uses like LED dimming. Audio applications often require <1 mV ripple and >40 kHz PWM.

Higher PWM frequency pushes the fundamental harmonic farther from DC, making it easier for a smaller RC filter to attenuate ripple. This improves response time and reduces component size/cost — but may increase switching losses or EMI concerns.

No — this tool models only a single-pole RC low-pass filter. For steeper roll-off or lower ripple without large components, consider cascading two stages (with isolation buffers) or using active filters; those require separate analysis beyond this calculator’s scope.

Increase the resistor value (and proportionally adjust C to maintain τ = RC) to reduce current draw — but verify that the new R doesn’t cause excessive voltage drop across R_L or violate your ripple requirement. Adding a unity-gain op-amp buffer isolates the filter from MCU limitations.

It assumes ideal components and neglects diode drops, op-amp offsets, or PCB parasitics. Real-world voltage will be close to V_PWM × Duty/100, but verify with measurement — especially at low duty cycles (<5%) or high frequencies where timing jitter and rise/fall times matter.

Yes — for stable RC filtering, aim for PWM frequency ≥10× the filter’s -3dB cutoff frequency (f_c = 1/(2πRC)). Frequencies below ~500 Hz often require impractically large capacitors for low ripple and risk audible noise in audio or motor applications.