Instrumentation Amplifier Design Guide
Three-Op-Amp Topology, CMRR, Gain Networks, RFI Filters & Bridge Sensing
1. Introduction — When a Plain Op-Amp Is Not Enough
An instrumentation amplifier (in-amp) is a precision analog block built to amplify a small differential signal riding on a large common-mode voltage while rejecting that common-mode voltage — the classic problem of a load-cell bridge, a shunt current sensor, a thermocouple, an ECG electrode pair, or a Hall-effect sensor. A generic differential amplifier made from one op-amp and four resistors rejects common-mode only as well as its resistor matching; with 0.1% resistors that is roughly 66 dB, and its input impedance is low and unequal. The instrumentation amplifier solves all three problems at once: it offers very high and symmetric differential input impedance, a single external resistor sets the gain over a wide range, and its internal architecture delivers excellent common-mode rejection ratio (CMRR) even at gain well above 1. This guide explains the classical three-op-amp architecture, the gain equation and resistor-network design, how to reason about CMRR and its frequency response, RFI/EMI input filtering, how to choose the reference pin and single-supply biasing, the selection of discrete vs integrated in-amps, worked examples for a bridge and a shunt monitor, and the pitfalls that silently degrade accuracy.
2. The Three-Op-Amp Instrumentation Amplifier
2.1 Architecture and gain
The classic in-amp consists of two input op-amps (A1, A2) configured as voltage followers with a shared gain-setting resistor RG between their inverting inputs, followed by a difference amplifier stage (A3) that subtracts the two intermediate outputs. If RG is the external gain resistor and R2/R1 are the fixed resistors of the difference stage, the gain equals the product of the two stages:
G = (1 + 2·R1/RG) · (R2/R1)
With equal internal pairs the difference stage often has unity gain, giving the well-known G = 1 + 2R/RG. The input voltage appears directly across RG (the two input op-amps force their inverting nodes to follow VIN+ and VIN−), so the differential input current, and hence the input impedance, is set by RG: tens of kΩ typical, hundreds of MΩ when RG is large or when the inputs are buffered by additional followers. Because the same common-mode voltage appears at both output nodes of A1/A2, the CM signal is rejected by the third stage, whose resistor matching (often laser-trimmed on-chip to 0.01%) sets the residual CMRR.
The gain-setting element determines accuracy: a 0.1% RG yields 0.1% gain error; temperature coefficient of RG appears directly in the gain drift. For the highest stability, use low-drift precision resistors (e.g. 25 ppm/°C) or a matched-pair network. Quick resistance math for divider/parallel combinations in the gain or bias networks is available in the resistor-parallel calculator.
2.2 The difference (output) stage
The third stage’s CMRR sets the practical floor. With external resistors 0.1% matched and gain 1, the stage CMRR is about 66 dB; at gain 4 the internal in-amp CMRR typically exceeds 100 dB. If you ever build a discrete in-amp, the difference stage resistor tolerances dominate — use a four-resistor matched array (e.g. 0.01%, 2 ppm/°C) and keep the resistor ratio exactly 1:1.
3. CMRR, PSRR and Their Frequency Dependence
3.1 Definitions
CMRR = 20·log10(Ad/ACM), where Ad is the differential gain and ACM is the common-mode gain. A 120 dB CMRR at DC still degrades at higher frequencies because of input capacitance imbalance and the finite gain-bandwidth of the input stage. For a sensor whose common-mode contains mains hum at 50/60 Hz plus switching noise at hundreds of kHz, the CMRR at those frequencies — not at DC — decides whether the interference is visible at the output. Supply rejection (PSRR) behaves similarly and drops with frequency; a switching regulator feeding an in-amp directly can inject ripple that neither CMRR nor PSRR rejects at the switching frequency.
3.2 Practical CMRR budget
- Define the expected CM amplitude (e.g. 5 V bridge offset, or 26 V battery-stack common mode).
- Define the acceptable CM-induced error at the output in volts.
- Convert to required CMRR in dB; verify the in-amp datasheet CMRR at the actual signal frequency and CM voltage, not just at DC.
4. RFI/EMI Input Filtering
Out-of-band RF energy (from nearby wireless transceivers, GSM bursts, motor-brush arcs) is rectified by the input-stage ESD diodes and bipolar junctions long before the linear gain processes it: the classic symptom is a DC offset of hundreds of µV that appears only when the RF source is on. The standard remedy is a differential and common-mode RC input filter placed right at the pins, sized so that the filter pole is far above the signal band but below several MHz. Because the two input bias currents must be roughly equal for CMRR, use a differential capacitor C_DIFF and two symmetric common-mode capacitors C_CM to ground; a common rule of thumb sets the −3 dB differential pole between 0.1 and 1 MHz and keeps the common-mode pole at least 2–3× the differential pole. Choose resistors low enough (typically 100 Ω–2 kΩ) to make bias-current-induced offset acceptable, and capacitor values that keep the CM mismatch small (e.g. C_DIFF = 10 nF, C_CM = 1 nF).
5. Reference Pin, Biasing and Single Supply
In single-supply systems (e.g. 3.3 V or 5 V) the output must be set to mid-scale so bipolar signals can swing both ways. The in-amp’s reference pin does exactly this: driving VREF to VCC/2 shifts the output so that a zero differential input produces mid-scale. The reference pin must be driven from a low-impedance source because it is the midpoint of the internal output-divider network; a simple resistive divider with a buffer or an op-amp follower is required. The output range is bounded by the output-stage rails — a rail-to-rail in-amp on 5 V with a 2.5 V reference provides roughly 50 mV–4.95 V of swing with gain chosen to fit the full-scale signal. Use the ohms-law calculator any time the bias network current or the reference divider dissipation needs a quick check without mental arithmetic.
6. Comparison — In-Amp vs Discrete vs Difference Amp
| Property | Three-op-amp in-amp (integrated) | Discrete (3× op-amp + resistors) | Single-op-amp difference amp |
|---|---|---|---|
| CMRR (G=10) | > 100 dB | 60–95 dB (resistor matching) | ~46–66 dB |
| Input impedance | Very high (GΩ) | High | Low, asymmetric |
| Gain accuracy | 0.01–0.1% | Bounded by RG matching | Bounded by 4 resistors |
| Cost / flexibility | Medium, fixed architecture | Highest flexibility | Lowest cost |
| Best use | Precision bridge, medical | Lab / custom conditions | Where CMRR demand is modest |
For production designs, the integrated in-amp nearly always wins on CMRR and drift because its internal matching is laser-trimmed. The discrete approach earns its place only when the fixed gain range or bandwidth of available parts is the wrong shape, or in very low volume.
7. Worked Example — Load-Cell Bridge at Gain 100
Specifications: a 350 Ω strain-gauge bridge with 2 mV/V sensitivity, 5 V excitation, full-scale differential output of 10 mV; ADC full-scale 1 V; common-mode ~2.5 V.
- Required gain: G = 1 V / 10 mV = 100 → G = 1 + 2R/RG.
- Pick internal R = 25 kΩ: RG = 2·25k/(100−1) = 505 Ω → use 499 Ω (gain 101.2, acceptable).
- Check CMRR at 60 Hz: 3-op-amp in-amp spec > 100 dB at G=100; with 5 V CM, residual CM error ≈ 5 V / 10^5 ≈ 50 µV — negligible.
- Add RFI filter: 1 kΩ inputs and C_DIFF = 10 nF → pole ≈ 1/(2π·2000·10n) ≈ 8 kHz, well above the 1 kHz signal band.
- Reference to 2.5 V: output = 2.5 V ± 0.5 V full scale.
- Bias current: with 10 nA Ib, a 1 kΩ series resistor adds 10 µV offset — fine; through-bias path for the differential capacitor must be present (e.g. 10 MΩ to common-mode reference).
8. Common Mistakes
- Unbalanced source impedance: unequal source resistances convert bias current mismatch into differential offset and lower CMRR at frequency.
- Oversized input filter: a filter pole placed inside the signal band attenuates the measurement unexpectedly; always compute the pole.
- Ignoring CMRR at the interference frequency: DC-spec CMRR says nothing about 100 kHz switching noise rejection.
- Leaving the reference pin floating: the output floats to an ill-defined level; always drive VREF from a buffer.
- Gain resistor drift mismatch: using two discrete RG with different tempco defeats precision; use a single low-drift RG or matched network.
- Forgetting input common-mode range: pushing the sensor common mode beyond the input voltage range of the input op-amps clips the amplifier.
9. FAQ
Q: Why is a differential amplifier not sufficient for a bridge? A: A single-op-amp difference amp draws unequal input currents and rejects common mode only as well as its resistor matching; for a 350 Ω bridge the input loading also disturbs the bridge balance.
Q: Can I use an in-amp with a single 3.3 V supply for a bipolar sensor? A: Yes, if the sensor common mode and signal stay within the input range and the reference is set to mid-scale; check the output swing near the rails.
Q: What is the noise trade-off of gain? A: Higher gain lowers the input-referred noise contribution of the output stage but the input voltage noise is the dominant term; choose the lowest-noise suitable part when the signal is small.
Q: Do I still need RFI filtering on a rail-to-rail CMOS in-amp? A: Yes — EMI rectification occurs at the front-end junctions regardless of architecture; the symptoms appear as offset only when RF is present.
10. Conclusion
The instrumentation amplifier is the precision analog front end for differential sensing in noisy environments. Design for CMRR at the frequencies that matter, filter the RF, drive the reference correctly, and match the gain path to the accuracy budget. Wherever a quick gain resistor or bias divider calculation is needed, the site’s resistor and Ohm’s law calculators remove the arithmetic from the decision.