STM32 Timer PWM Calculator
Derive PWM frequency, resolution and compare (CCR) value from the timer clock, prescaler and auto-reload register on STM32 timers.
About This Calculator
An STM32 timer generates PWM by counting from 0 to ARR at the timer clock divided by (PSC+1), and toggling the output when the counter reaches the compare value CCR. Enter the register values and this tool computes the resulting frequency and pulse width.
How to Use
- Set the timer input clock (e.g. 72 MHz on APB1 timers of an F103 on a 72 MHz system clock).
- Enter PSC and ARR. Remember the divider is (PSC+1) and period count is (ARR+1).
- Set the desired duty; the output CCR is rounded to an integer register value, so a low ARR limits achievable resolution.
- Watch the resolution bits — below ~2 bits the duty step becomes coarse.
Formulas
| PWM frequency | f = f(clk) / ((PSC+1) × (ARR+1)) |
| Period | T = 1 / f |
| Compare value | CCR = (ARR+1) × Duty/100 |
| Resolution | R = log2(ARR + 1) bits |
Design Notes
For 16-bit timers keep (ARR+1) ≤ 65536 and (PSC+1) ≤ 65536.
Advanced timers (TIM1/TIM8) add repetition counter and dead-time registers — those are not modeled here.