Inverting, Non-Inverting, Differential & Instrumentation Amplifiers
Master operational amplifier gain configurations — from inverting and non-inverting topologies to differential amplifiers. Learn the formulas, work through real examples, and avoid common pitfalls in your analog circuit designs.
Calculate gain, resistor values, and output voltage instantly for any op-amp configuration.
Operational amplifier gain is the ratio of output voltage to input voltage, determined primarily by the external feedback network. For an ideal op-amp with infinite open-loop gain, the closed-loop gain depends only on the resistor ratio: Inverting gain = -Rf/Rin; Non-inverting gain = 1 + Rf/Rg; Differential gain = Rf/Rin (when resistor ratios match). The op-amp’s enormous open-loop gain (AOL typically >100 dB) combined with negative feedback creates a precision amplifier whose gain is set accurately by passive components alone.
An operational amplifier (op-amp) is a DC-coupled high-gain electronic voltage amplifier with a differential input and, typically, a single-ended output. In its ideal form, the op-amp exhibits infinite open-loop gain, infinite input impedance, zero output impedance, and infinite bandwidth. While no physical device achieves these ideals, modern op-amps approximate them closely enough that the ideal op-amp assumptions serve as an excellent foundation for first-order design.
The two golden rules of ideal op-amp analysis are: (1) the voltage difference between the inverting (−) and non-inverting (+) inputs is zero (virtual short), and (2) no current flows into either input terminal. These rules, combined with negative feedback, allow us to derive closed-loop gain equations that depend almost exclusively on external passive components.
Op-amp gain configurations fall into three primary families: inverting, where the input signal is applied to the inverting terminal and the output is phase-inverted; non-inverting, where the input is applied to the non-inverting terminal and the output maintains phase; and differential, where the amplifier rejects common-mode signals and amplifies only the difference between two inputs. Each topology offers distinct advantages in terms of input impedance, noise performance, and signal conditioning capability.
The inverting amplifier is the most widely used op-amp configuration. The input signal is applied through a series resistor Rin to the inverting terminal, while the non-inverting terminal is tied to ground. Feedback resistor Rf connects the output to the inverting terminal.
Closed-Loop Gain: ACL = -Rf / Rin
The negative sign indicates a 180-degree phase inversion between input and output. The gain magnitude depends purely on the resistor ratio and is independent of the op-amp’s open-loop gain (provided AOL is sufficiently high). Input impedance equals Rin, making this configuration suitable when a defined input impedance is required.
The non-inverting amplifier applies the input signal directly to the non-inverting terminal. A voltage divider formed by Rg (to ground) and Rf (feedback to inverting terminal) sets the gain.
Closed-Loop Gain: ACL = 1 + Rf / Rg
The minimum achievable gain is unity (when Rf = 0 or Rg is open). Input impedance is extremely high — equal to the op-amp’s differential input impedance multiplied by loop gain — making this the preferred choice for high-impedance signal sources such as sensors and piezoelectric transducers.
The differential (or difference) amplifier amplifies the voltage difference between two inputs while rejecting common-mode voltage. It typically uses four resistors in a bridge configuration.
When R1/R2 = Rf/Rg: AD = Rf / Rin
For optimal common-mode rejection ratio (CMRR), the resistor ratios must be precisely matched. Even a 0.1% mismatch can degrade CMRR from 80 dB to below 60 dB. Precision matched resistor arrays or integrated difference amplifiers are recommended for critical applications.
| Parameter | Symbol | Ideal Value | Typical Real Value | Design Impact |
|---|---|---|---|---|
| Open-Loop Gain | AOL | Infinite | 100–140 dB | Determines gain accuracy; higher AOL reduces closed-loop error |
| Input Impedance | ZIN | Infinite | 1 MΩ – 1012 Ω | Affects loading of signal source; CMOS op-amps have highest ZIN |
| Output Impedance | ZOUT | Zero | 10–200 Ω | Limits current drive and affects load regulation |
| Gain-Bandwidth Product | GBW | Infinite | 1–100 MHz | Sets maximum usable gain at a given frequency; GBW = ACL × BW |
| Slew Rate | SR | Infinite | 0.1–5000 V/μs | Limits large-signal bandwidth; SR = 2π × f × Vpk |
| Input Offset Voltage | VOS | Zero | 1 μV – 10 mV | Creates DC error at output; chopper-stabilized op-amps minimize this |
| Input Bias Current | IB | Zero | 1 fA – 1 μA | Causes offset voltage across feedback resistors; CMOS op-amps have lowest IB |
| Common-Mode Rejection Ratio | CMRR | Infinite | 60–130 dB | Measures ability to reject common-mode signals; critical for differential amplifiers |
| Power Supply Rejection Ratio | PSRR | Infinite | 80–120 dB | Indicates output change due to supply voltage variation |
| Total Harmonic Distortion | THD | Zero | 0.0001% – 0.1% | Critical for audio and precision signal processing |
Design a non-inverting amplifier with a gain of +10 V/V using standard 1% resistor values. Input signal range is ±1 V, bandwidth requirement is 100 kHz, and the supply voltage is ±15 V.
Gain equation: ACL = 1 + Rf / Rg = 10
Therefore: Rf / Rg = 9
Choose Rg = 10 kΩ (standard value)
Rf = 9 × 10 kΩ = 90 kΩ → nearest 1% standard value is 90.9 kΩ
ACL = 1 + 90.9 / 10 = 1 + 9.09 = 10.09
Error = (10.09 − 10) / 10 = 0.9% — well within 1% tolerance band.
Select op-amp with GBW ≥ ACL × BW = 10 × 100 kHz = 1 MHz
Recommended: TL081 (GBW = 3 MHz) or LM358 (GBW = 1 MHz).
Maximum output: ±1 V × 10.09 = ±10.09 V
With ±15 V supplies and typical rail-to-rail output, this is comfortably within range.
ZIN ≈ ZIN(op-amp) × AOL / ACL
For TL081 (ZIN = 1012 Ω, AOL = 200k):
ZIN ≈ 1012 × 200000 / 10 = 2 × 1016 Ω (essentially negligible loading).
Design an inverting amplifier with a gain of −5 V/V. Input impedance must be at least 10 kΩ. Maximum input signal is 2 Vpp.
Input impedance = Rin = 10 kΩ (chosen to meet minimum requirement).
Gain = −Rf / Rin = −5
Rf = 5 × 10 kΩ = 50 kΩ → nearest 1% value: 49.9 kΩ
ACL = −49.9 / 10 = −4.99
Error: 0.2% — excellent accuracy.
To minimize offset voltage due to bias current, add Rcomp = Rin ∥ Rf = 10k ∥ 49.9k ≈ 8.33 kΩ between non-inverting terminal and ground.
With GBW = 1 MHz: BW = 1 MHz / 5 = 200 kHz
For audio applications (20 Hz–20 kHz), this is more than adequate.
Many designers select a gain without checking whether the op-amp’s GBW product can support it at the required frequency. For example, setting a closed-loop gain of 100 with the LM741 (GBW = 1.5 MHz) limits bandwidth to just 15 kHz. Always verify that f−3dB = GBW / ACL exceeds your maximum signal frequency by at least a factor of 5–10.
Using resistor values below 1 kΩ wastes power and may exceed the op-amp’s output current capability. Values above 1 MΩ increase noise, reduce bandwidth due to parasitic capacitance, and make the circuit susceptible to PCB leakage currents. The sweet spot for most precision circuits is 10 kΩ–100 kΩ.
In inverting and non-inverting configurations, imbalance in the DC resistance seen by each input terminal creates an additional offset voltage: VOS = IB × ΔR. For a bipolar op-amp with IB = 500 nA and ΔR = 10 kΩ, this adds 5 mV of offset — potentially larger than the op-amp’s specified VOS.
Many op-amps cannot swing to within 1–2 V of the supply rails when driving loads below 2 kΩ. Check the datasheet’s output voltage swing vs. load current specification, and use a buffer stage if driving low-impedance loads.
Even 0.1% resistor mismatch in a differential amplifier can degrade CMRR from theoretical infinity to approximately 66 dB. For high-precision differential measurements, use 0.01% matched resistor arrays or an integrated instrumentation amplifier.
Capacitive loads, high feedback resistor values combined with input capacitance, and certain gain configurations can cause oscillation. Always simulate the phase margin and add a small feedback capacitor (10–100 pF) in parallel with Rf if needed.
Omitting local decoupling capacitors (0.1 μF ceramic + 10 μF electrolytic per supply pin) leads to high-frequency instability and oscillation, especially in high-gain configurations. Place decoupling capacitors as close as possible to the op-amp supply pins.
Simulation is not a substitute for hardware verification. Parasitic capacitance on the PCB, non-ideal resistor behavior, and thermal effects can all alter the actual gain. Build your circuit on a breadboard or prototype PCB, measure the gain with a signal generator and oscilloscope, and compare against your calculations.
A: Open-loop gain (AOL) is the intrinsic gain of the op-amp without any feedback network — typically 100 dB to 140 dB. It is imprecise and varies with temperature, supply voltage, and manufacturing batch. Closed-loop gain (ACL) is the gain of the amplifier with negative feedback applied, determined by external resistors. It is precise, stable, and predictable, trading off the enormous open-loop gain for accuracy and bandwidth.
A: The negative sign indicates a 180-degree phase inversion between input and output. When the input voltage at the inverting terminal rises, the output swings negative to maintain the virtual short condition. This phase inversion is inherent to the inverting topology and must be considered in feedback systems and signal chains where phase matters.
A: The non-inverting amplifier provides the highest input impedance, theoretically approaching the op-amp’s differential input impedance multiplied by the loop gain (typically 1012–1015 Ω for CMOS op-amps). In contrast, the inverting amplifier’s input impedance equals Rin (typically 1 kΩ–100 kΩ), making it unsuitable for high-impedance sources without a buffer.
A: Follow these guidelines: (1) Keep resistor values between 1 kΩ and 1 MΩ — below 1 kΩ wastes power; above 1 MΩ increases noise and parasitic effects. (2) Use 1% tolerance or better for precision. (3) Consider using standard E96 series values for designs requiring specific ratios. (4) For differential amplifiers, use matched resistor arrays to maintain high CMRR. (5) For battery-powered circuits, use higher resistor values (100 kΩ–1 MΩ) to minimize quiescent current.
A: Gain-bandwidth product (GBW) is the frequency at which the open-loop gain drops to unity (0 dB). It is a constant for a given op-amp and defines the trade-off between gain and bandwidth: f−3dB = GBW / ACL. For example, the TL081 with GBW = 3 MHz can deliver a gain of 10 up to 300 kHz. Always select an op-amp whose GBW is at least 5–10 times your required bandwidth at the desired gain.
A: While possible in theory, it is strongly discouraged. Op-amps are optimized for linear operation with negative feedback and have slow recovery times from saturation. Comparators are specifically designed for open-loop operation with faster response, hysteresis, and digital-compatible outputs. Using an op-amp as a comparator can result in latch-up, excessive power dissipation, and very slow transition times.
A: Slew rate (SR) limits the op-amp’s large-signal bandwidth. The maximum output voltage swing without distortion is: Vpk = SR / (2π × f). For example, the LM741 with SR = 0.5 V/μs can only swing ±0.8 V at 100 kHz without slew-rate limiting. For high-frequency, large-signal applications, choose a high-slew-rate op-amp (e.g., THS4631 with SR = 1000 V/μs).
A: Virtual short is the condition where the voltage difference between the inverting and non-inverting inputs is approximately zero (typically <1 mV) due to negative feedback and the op-amp’s extremely high open-loop gain. The inputs are not physically shorted — no current flows between them — but the feedback forces them to the same voltage. This principle is the foundation of all op-amp circuit analysis.
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